ISM Funding Schemes — Fab, ATMP & DLI explained
The India Semiconductor Mission operates through three distinct funding schemes — each targeting a different part of the semiconductor value chain with a different support structure. Here is exactly how each works, what it covers, and who has been approved.
Semiconductor & Display Fabrication Plants
For companies setting up silicon wafer fabrication plants (fabs) and display fabrication units. This is the scheme that attracted Tata Electronics (PSMC partnership for Dholera), and a separate Tata Electronics compound semiconductor fab. It provides up to 50% of project cost as fiscal support on a pari-passu basis — disbursed as construction milestones are met, not upfront.
The Expenditure Finance Committee (chaired by Secretary, Department of Expenditure) appraises applications and determines the exact structure and quantum of support on a project-by-project basis. There is no fixed formula — each project is evaluated independently.
- Support level
- Up to 50% of project cost
- Disbursement
- Pari-passu — milestone-linked
- Target
- Silicon fabs, display fabs, compound semi fabs
- Appraised by
- Expenditure Finance Committee
- Node focus
- 28nm and below (advanced); legacy nodes also eligible
- ISM 2.0 change
- Equipment manufacturing now also incentivised
ATMP, OSAT, Compound Semiconductors & Discrete Fabs
For companies setting up back-end semiconductor manufacturing — Assembly, Testing, Marking and Packaging (ATMP) and Outsourced Semiconductor Assembly and Test (OSAT) facilities. Also covers compound semiconductor fabs (GaN, SiC, InP), silicon photonics, MEMS/sensors, and discrete semiconductor units.
This is the scheme behind Micron Sanand, Kaynes Semicon, CG Semi, and the largest number of ISM-approved projects. 50% of capital expenditure is provided — a direct de-risking of the largest cost component of setting up a packaging facility.
- Support level
- 50% of capital expenditure
- Disbursement
- Milestone-linked capex tranches
- Target
- ATMP, OSAT, compound semi, MEMS, sensors, discrete
- Investment range
- ₹200 crore to ₹22,900 crore per project
- States active
- Gujarat, Karnataka, Odisha, Assam, Tamil Nadu, UP
- Approved projects
- 11 as of mid-2026
Design Linked Incentive (DLI) — Chip Design Support
The DLI scheme supports semiconductor chip design companies and startups in India — covering the cost of design work, EDA tools, IP licensing, and prototype fabrication. Unlike the Fab and ATMP schemes (which fund manufacturing capex), DLI funds the intellectual work of creating chip designs.
Support is provided in two layers: a product design incentive (up to 50% of eligible expenditure, capped ₹15 crore per application) and a deployment-linked incentive (4–6% of net sales over 5 years, capped ₹30 crore). As of January 2026, 24 projects had been approved and 16 tape-outs completed — India's fabless semiconductor ecosystem is visibly emerging.
- Design support
- Up to 50% of eligible expenditure
- Design cap
- ₹15 crore per application
- Sales incentive
- 4–6% of net sales for 5 years
- Sales cap
- ₹30 crore per company
- Projects approved
- 24 (as of Jan 2026)
- Tape-outs
- 16 completed (as of Jan 2026)
DLI covers: Chip design expenditure, EDA tool costs, IP licensing fees, prototype fabrication (tape-out), testing and characterisation of design prototypes. It does not cover manufacturing capex — that falls under the Fab or ATMP schemes. Under ISM 2.0: DLI scope is being expanded to support full-stack IP development, not just individual chip designs — targeting 100+ advanced design IPs and the AI-enabled Semiconductor Engineering Mission.
Building the workforce for ISM-approved facilities?
The 11 approved ATMP/OSAT projects need operators, technicians, and process engineers. We advise institutions on building the right programmes for the right facilities.