Plain-English resources on India’s chip build-out — the companies building it, the jobs it creates, the ₹76,000 crore mission funding it, the vocabulary behind it, and the Mohali corridor at its oldest address. Built for institutions, students, engineers and industry partners entering this space.
From first principles to hyper-local. Read in any order; each stands alone.
What is OSAT? What is ATMP? Most Indian engineers can name them but can’t explain them. This is the plain-English breakdown: the full back-end flow from wafer to packaged chip, how package families work (QFN, BGA, flip-chip, advanced), what the OSAT vs ATMP distinction actually means, and why India’s build-out is concentrated here.
The complete map of who’s building India’s semiconductor back-end: Micron (DRAM/NAND, Sanand), CG Power–Renesas (OSAT, Sanand), Kaynes Semicon (multi-chip modules), Tata TSAT (48M chips/day, Assam), HCL–Foxconn (Jewar), CDIL (SiC, Mohali), SCL (government fab, Mohali), and more. Status, capacity, investment and hiring information for each.
What ATMP facilities actually hire for — eight manufacturing-floor roles in plain English (wire bond, die attach, flip chip, test, reliability, equipment, yield, package design). Salary ranges at every level. The design vs manufacturing distinction that matters for where you apply. What to search on Naukri and LinkedIn. Why early movers have a structural advantage.
The ₹76,000 crore ($10B) programme driving India’s chip build-out. The three ISM schemes (fab, ATMP/OSAT, DLI design), what each funds, the project timeline from CG Semi G1 pilot (Aug 2025) to Tata–PSMC Dholera fab (first silicon late 2026), C2S skilling stats, DLI outcomes, and an honest assessment of what the mission has not yet achieved.
The honest split: chip design courses are widely available (C2S, 315 institutions, free EDA tools). Hands-on manufacturing courses in ATMP/OSAT are scarce, because they need real equipment and trained faculty. What an operator course actually covers, how NSQF certification works, what makes a programme plant-linked, and why placement is the proof point.
24 terms defined with Indian examples and live filter by category. OSAT, ATMP, fabless, IDM, foundry, process node (what 28nm actually means), wire bonding, flip chip, die attach, ATE, EDA, CMOS, VLSI, tape-out, SiC, DRAM, NAND, wafer, front-end vs back-end, C2S, DLI and more. Filterable by back-end, front-end, design, business model, India-specific, and materials.
India’s oldest chip address — SCL (1984, India’s only government fab, Mangalyaan chips, ₹4,500 crore upgrade announced Nov 2025) and CDIL (1964, India’s oldest semiconductor company, first SiC maker, ISM-approved expansion Aug 2025). The April 2026 NXP R&D courtship in the Netherlands. Punjab’s IBDP 2026 incentives (125% FCI, 15yr, ₹500cr cap). The institutional talent pipeline. A realistic 5-year outlook for the Mohali semiconductor corridor.
India’s first commercial logic fab is under construction in Dholera, Gujarat. ₹91,000 crore. 300mm wafers. 28nm–110nm process nodes. PSMC as technology partner. On May 16, 2026, Tata Electronics signed a framework agreement with ASML — the Dutch company that manufactures every EUV lithography machine on earth — confirming equipment supply for the fab. First silicon is targeted for late 2026. This is the project that turns India from a chip-packaging country into a chip-making country.
If you want to know what semiconductor jobs exist, what they pay, what degree you need, and where the facilities are — the jobs guide and courses guide are your starting points. The glossary will fill the gaps when you encounter unfamiliar terms.
If you’re evaluating whether and how to add semiconductor skilling to your institution, the courses landscape and the ISM guide explain the policy environment and what funding is available. The talent enablement page is how Fidus can help directly.
If you need a clear, verified map of India’s approved ATMP/OSAT projects — who has built what, where, and at what scale — the company map is the reference. The Mohali guide is the hyper-local version for the Punjab corridor.
Fidus Synergies advises institutions on building real, plant-linked ATMP/OSAT skilling programmes — the hands-on manufacturing side that India’s new semiconductor facilities need and most colleges don’t yet offer. We publish these resources because the information that should be freely available to students, institutions and partners navigating this space often isn’t — scattered across PIB releases, industry reports and government portals.
Every number in these guides is dated and sourced. Where data conflicts across sources, we note it rather than pick the round number. Where the situation is still developing (NXP in Mohali, SCL’s 25-acre allocation), we flag it explicitly as such.
We advise institutions on real, plant-linked ATMP/OSAT programmes — from model and funding to faculty, certification and placement.
